----------------------------------------------------------------------------------
-- Company: MordorBet
-- Engineer: Urko Pineda
--
-- Description: Procesos principales.
--
----------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity Principal is
Port( clk: in std_logic;
rst: in std_logic;
leds: out std_logic_vector(7 downto 0);
ibtn50: in std_logic;
ibtn100: in std_logic;
ibtn200: in std_logic;
ans: out std_logic_vector(3 downto 0);
seven_seg: out std_logic_vector(6 downto 0);
dp: out std_logic;
switchman: in std_logic;
rx: in std_logic;
tx: out std_logic );
end Principal;
architecture Behavioral of Principal is
component Debounce is
Generic( counter_size: INTEGER := 10 );
Port( clk: in std_logic;
btn_in: in std_logic;
btn_out: out std_logic );
end component;
component Divisor is
Port( clk: in std_logic;
rst: in std_logic;
mode: in std_logic_vector(1 downto 0);
div_clk: out std_logic );
end component;
component UART is
Port( clk: in std_logic;
EOC: out std_logic;
OUTP: inout std_logic_vector(7 downto 0);
RXD: in std_logic;
TXD: out std_logic;
EOT: out std_logic;
INP: in std_logic_vector(7 downto 0);
READY: out std_logic;
WR: in std_logic );
end component;
-- Constantes que se utilizan para escribir los numeros en el SSD.
constant cero: std_logic_vector(6 downto 0) := "1000000";
constant uno: std_logic_vector(6 downto 0) := "1111001";
constant dos: std_logic_vector(6 downto 0) := "0100100";
constant tres: std_logic_vector(6 downto 0) := "0110000";
constant cuatro: std_logic_vector(6 downto 0) := "0011001";
constant cinco: std_logic_vector(6 downto 0) := "0010010";
constant seis: std_logic_vector(6 downto 0) := "0000010";
constant siete: std_logic_vector(6 downto 0) := "1111000";
constant ocho: std_logic_vector(6 downto 0) := "0000000";
constant nueve: std_logic_vector(6 downto 0) := "0010000";
-- CLK divididos.
signal clk_ssd: std_logic;
signal clk_btn: std_logic;
signal clk_led: std_logic;
-- Informe de estado.
signal estadobtn: std_logic := '0';
signal estadoled: std_logic := '0';
signal estadocnt : std_logic_vector(1 downto 0) := "00";
-- Botones de 50 cent, 1€ y 2€ con debounce aplicado + auxiliar de 50 cent.
signal btn50aux : integer range 0 to 1 := 0;
signal btn50: std_logic;
signal btn100: std_logic;
signal btn200: std_logic;
-- Numeros a enseñar en el SSD.
signal count1: integer range 0 to 9 := 0;
signal count2: integer range 0 to 9 := 0;
signal count3: integer range 0 to 9 := 0;
signal count4: integer range 0 to 9 := 0;
signal man1 : integer range 0 to 9 := 0;
signal man2 : integer range 0 to 9 := 0;
signal man3 : integer range 0 to 9 := 0;
signal man4 : integer range 0 to 9 := 0;
signal aux1 : integer range 0 to 9 := 0;
signal aux2 : integer range 0 to 9 := 0;
signal aux3 : integer range 0 to 9 := 0;
signal aux4 : integer range 0 to 9 := 0;
-- Variable para seleccionar los anodos y leds.
signal r_ans: std_logic_vector(1 downto 0) := "00";
signal r_leds: std_logic_vector(2 downto 0) := "000";
-- Modo mantenimiento.
signal manteniMode : std_logic := '0';
-- UART variables.
signal eoc_sig: std_logic := '0';
signal eot_sig: std_logic := '0';
signal ready_sig: std_logic := '0';
signal wr_sig: std_logic := '0';
-- AUX
signal uart_aux: std_logic_vector(1 downto 0) := "00";
signal tx_aux: std_logic := '0';
-- DATA
signal data_in: std_logic_vector(7 downto 0) := "00000000";
signal data_out: std_logic_vector(7 downto 0) := "00000000";
signal data_aux: std_logic_vector(7 downto 0) := "00000000";
signal data_aux_led: std_logic_vector(7 downto 0) := "00000000";
signal data_aux_btn: std_logic_vector(7 downto 0) := "00000000";
begin
deb50: Debounce port map (clk, ibtn50, btn50);
deb100: Debounce port map (clk, ibtn100, btn100);
deb200: Debounce port map (clk, ibtn200, btn200);
divssd: Divisor port map (clk, rst, "00", clk_ssd);
divbtn: Divisor port map (clk, rst, "01", clk_btn);
divled: Divisor port map (clk, rst, "10", clk_led);
uartcom: UART port map (clk, eoc_sig, data_in, rx, tx, eot_sig, data_out, ready_sig, wr_sig);
ledsys: process(clk_led, rst)
begin
if (rst = '1') then
elsif (rising_edge(clk_led)) then
if (estadoled = '0') then
case r_leds is
when "000" =>
leds <= "10101010";
when "001" =>
leds <= "01010101";
when "010" =>
leds <= "10101010";
when "011" =>
leds <= "01010101";
when "100" =>
leds <= "10101010";
when "101" =>
leds <= "01010101";
when "111" =>
leds <= "10101010";
when others =>
leds <= "11111111";
end case;
if (r_leds = "000") then
r_leds <= "001";
elsif (r_leds = "001") then
r_leds <= "010";
elsif (r_leds = "010") then
r_leds <= "011";
elsif (r_leds = "011") then
r_leds <= "100";
elsif (r_leds = "100") then
r_leds <= "101";
elsif (r_leds = "101") then
r_leds <= "111";
elsif (r_leds = "111") then
r_leds <= "000";
end if;
elsif (estadoled = '0') then
r_leds <= "000";
leds <= "00000000";
end if;
end if;
end process;
btnsys: process(clk, rst)
variable btnpressed: std_logic_vector(1 downto 0) := "00";
begin
if (rst = '1') then
btnpressed := "00";
if (manteniMode = '0') then
count1 <= 0;
count2 <= 0;
count3 <= 0;
count4 <= 0;
aux1 <= 0;
aux2 <= 0;
aux3 <= 0;
aux4 <= 0;
end if;
elsif (rising_edge(clk)) then
if (estadobtn = '1') then
btnpressed := "00";
estadocnt <= "00";
if (manteniMode = '0') then
count1 <= 0;
count2 <= 0;
count3 <= 0;
count4 <= 0;
aux1 <= 0;
aux2 <= 0;
aux3 <= 0;
aux4 <= 0;
end if;
end if;
if (estadobtn = '0') then
if (manteniMode = '0' and estadocnt = "00") then
if (btn50 = '1') then
btnpressed := "01";
estadocnt <= "01";
elsif (btn100 = '1') then
btnpressed := "10";
estadocnt <= "01";
elsif (btn200 = '1') then
btnpressed := "11";
estadocnt <= "01";
end if;
end if;
if(estadocnt = "01") then
if(btn50 = '0' and btn100 = '0' and btn200 = '0') then
case btnpressed is
when "01" =>
if (btn50aux = 0) then
count1 <= 5;
btn50aux <= 1;
elsif (btn50aux = 1) then
count1 <= 0;
btn50aux <= 0;
if (count2 = 9) then
count2 <= 0;
count3 <= count3 + 1;
if (count3 = 9) then
count3 <= 0;
count4 <= count4 + 1;
end if;
else
count2 <= count2 + 1;
end if;
end if;
when "10" =>
if (count2 = 9) then
count2 <= 0;
count3 <= count3 + 1;
if (count3 = 9) then
count3 <= 0;
count4 <= count4 + 1;
end if;
else
count2 <= count2 + 1;
end if;
when "11" =>
if (count2 = 8) then
count2 <= 0;
count3 <= count3 + 1;
if (count3 = 9) then
count3 <= 0;
count4 <= count4 + 1;
end if;
elsif (count2 = 9) then
count2 <= 1;
count3 <= count3 + 1;
if (count3 = 9) then
count3 <= 0;
count4 <= count4 + 1;
end if;
else
count2 <= count2 + 2;
end if;
when others =>
estadocnt <= "00";
end case;
estadocnt <= "00";
btnpressed := "00";
end if;
end if;
if (switchman = '0') then
aux1 <= count1;
aux2 <= count2;
aux3 <= count3;
aux4 <= count4;
else
aux1 <= man1;
aux2 <= man2;
aux3 <= man3;
aux4 <= man4;
end if;
end if;
if (switchman = '0') then
manteniMode <= '0';
else
manteniMode <= '1';
end if;
end if;
end process;
ssdsys: process(clk_ssd, rst)
begin
if (rst = '1') then
elsif (rising_edge(clk_ssd)) then
case r_ans is
when "00" => ans <= "1110";
when "01" => ans <= "1101";
when "10" => ans <= "1011";
when "11" => ans <= "0111";
when others => ans <= "1111";
end case;
case r_ans is
when "00" =>
case aux1 is
when 0 =>
seven_seg <= cero;
when 1 =>
seven_seg <= uno;
when 2 =>
seven_seg <= dos;
when 3 =>
seven_seg <= tres;
when 4 =>
seven_seg <= cuatro;
when 5 =>
seven_seg <= cinco;
when 6 =>
seven_seg <= seis;
when 7 =>
seven_seg <= siete;
when 8 =>
seven_seg <= ocho;
when 9 =>
seven_seg <= nueve;
when others =>
seven_seg <= cero;
end case;
dp <= '1';
when "01" =>
case aux2 is
when 0 =>
seven_seg <= cero;
when 1 =>
seven_seg <= uno;
when 2 =>
seven_seg <= dos;
when 3 =>
seven_seg <= tres;
when 4 =>
seven_seg <= cuatro;
when 5 =>
seven_seg <= cinco;
when 6 =>
seven_seg <= seis;
when 7 =>
seven_seg <= siete;
when 8 =>
seven_seg <= ocho;
when 9 =>
seven_seg <= nueve;
when others =>
seven_seg <= cero;
end case;
dp <= '0';
when "10" =>
case aux3 is
when 0 =>
seven_seg <= cero;
when 1 =>
seven_seg <= uno;
when 2 =>
seven_seg <= dos;
when 3 =>
seven_seg <= tres;
when 4 =>
seven_seg <= cuatro;
when 5 =>
seven_seg <= cinco;
when 6 =>
seven_seg <= seis;
when 7 =>
seven_seg <= siete;
when 8 =>
seven_seg <= ocho;
when 9 =>
seven_seg <= nueve;
when others =>
seven_seg <= cero;
end case;
dp <= '1';
when "11" =>
case aux4 is
when 0 =>
seven_seg <= cero;
when 1 =>
seven_seg <= uno;
when 2 =>
seven_seg <= dos;
when 3 =>
seven_seg <= tres;
when 4 =>
seven_seg <= cuatro;
when 5 =>
seven_seg <= cinco;
when 6 =>
seven_seg <= seis;
when 7 =>
seven_seg <= siete;
when 8 =>
seven_seg <= ocho;
when 9 =>
seven_seg <= nueve;
when others =>
seven_seg <= cero;
end case;
dp <= '1';
when others =>
seven_seg <= "1111111";
end case;
if (r_ans = "00") then
r_ans <= "01";
elsif (r_ans = "01") then
r_ans <= "10";
elsif (r_ans = "10") then
r_ans <= "11";
elsif (r_ans = "11") then
r_ans <= "00";
end if;
end if;
end process;
serialsys: process(clk, rst)
begin
if (rst = '1') then
elsif (rising_edge(clk)) then
if (estadobtn = '0') then
if (ready_sig = '1') then
if (uart_aux = "00") then
if (btn50 = '1') then
data_out <= "00000001";
uart_aux <= "01";
end if;
if (btn100 = '1') then
data_out <= "00000010";
uart_aux <= "01";
end if;
if (btn200 = '1') then
data_out <= "00000100";
uart_aux <= "01";
end if;
elsif (uart_aux = "01") then
if(btn50 = '0' and btn100 = '0' and btn200 = '0') then
wr_sig <= '1';
uart_aux <= "11";
end if;
elsif (uart_aux = "11") then
wr_sig <= '0';
uart_aux <= "00";
end if;
end if;
end if;
end if;
end process;
txledsys: process (eoc_sig, rst)
begin
if (rst = '1') then
elsif (falling_edge(eoc_sig)) then
data_aux_led <= data_in;
if (data_aux_led = "00000011") then
if (estadoled = '0') then
estadoled <= '1';
elsif (estadoled = '1') then
estadoled <= '0';
end if;
data_aux_led <= "00000000";
end if;
end if;
end process;
txbtnsys: process (eoc_sig, rst)
begin
if (rst = '1') then
elsif (falling_edge(eoc_sig)) then
data_aux_btn <= data_in;
if (data_aux_btn = "00000001") then
if (estadobtn = '0') then
estadobtn <= '1';
elsif (estadobtn = '1') then
estadobtn <= '0';
end if;
data_aux_btn <= "00000000";
end if;
end if;
end process;
end Behavioral;
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